Pixel, Display Device Including The Pixel, And Driving Method Of The Display Device

ABSTRACT

A display device that includes a pixel including an organic light emitting diode (OLED), a driving transistor connected to the driving voltage and supplying a driving current to the OLED, a compensation capacitor connected to the gate electrode of the driving transistor, and a first storage capacitor and a second storage capacitor electrically connected to or blocked from the compensation capacitor, and a driving method thereof.

CROSS-REFERENCE TO RELATED APPLICATION

This application claims priority to and the benefit of Korean PatentApplication No. 10-2011-0047525, filed in the Korean IntellectualProperty Office on May 19, 2011, the entire content of which isincorporated herein by reference.

BACKGROUND

1. Field

The following description relates to a pixel, a display device includingthe same, and a driving method thereof. Particularly, the followingdescription relates to a pixel including an organic light emitting diode(OLED), a display device of an active matrix type including the same,and a driving method thereof.

2. Description of the Related Art

One frame of the active matrix type of display device includes a scanperiod for programming image data and a light emitting period foremitting light according to the programmed image data. However, as thesize of the display panel and the resolution thereof is increased, theResitive-Capacitive (RC) delay of the display panel is increased. Thus,the time for programming the image data to each pixel of the displaypanel is increased such that it is difficult to drive the displaydevice.

Also, when the display device displays a stereoscopic image, thisproblem may be more severe.

When the display device displays the stereoscopic image according to aNational Television System Committee (NTSC) method, the display devicemust alternately display left eye pictures of 60 frames and right eyepictures of 60 frames during one second. Accordingly, the drivingfrequency of the display device to display the stereoscopic image mustbe at least twice compared with the display device displaying a planeimage.

In the case of displaying the stereoscopic image, data writing must becompleted within at least 1/120 of a second, and therefore a driveroperating with a high driving frequency to scan the entire display panelduring the scan period and to program the image data is required. Thedriver of the high driving frequency increases production cost.

The above information disclosed in this Background section is only forenhancement of understanding of the background of the invention andtherefore it may contain information that does not form the prior artthat is already known in this country to a person of ordinary skill inthe art.

SUMMARY

Aspects of embodiments of the present invention are directed toward apixel suitable for a large-sized and high resolution display device andthat displays a stereoscopic image, a display device including the same,and a driving method thereof.

A display device according to an embodiment of the present inventionincludes a plurality of pixels including an organic light emitting diode(OLED), a driving transistor connected to a driving voltage andsupplying a driving current to the organic light emitting diode (OLED),a compensation capacitor connected to the gate electrode of the drivingtransistor, a first storage capacitor electrically connected to ordisconnected from the compensation capacitor, and a second storagecapacitor. A driving method of the display device includes: a reset stepin which an anode voltage of the organic light emitting diode (OLED) isdischarged; a compensation step in which a threshold voltage of thedriving transistor is stored to the compensation capacitor; a scan stepin which the data voltage is stored to the first storage capacitoraccording to the corresponding data signal; and a light emitting step inwhich the organic light emitting diode (OLED) emits light according tothe driving current flowing to the driving transistor by the datavoltage stored to the second storage capacitor, wherein the lightemitting steps of the plurality of pixels are concurrently orsimultaneously generated, and the scan step and the light emitting stepare temporally overlapped.

In one embodiment, the scan step includes a step in which the connectionof the first storage capacitor and the compensation capacitor isblocked, and the first storage capacitor is transmitted with thecorresponding data signal.

In one embodiment, the light emitting step includes a step in which thesecond storage capacitor and the compensation capacitor are connected,and the voltage of the gate electrode of the driving transistor ischanged by the data voltage stored in the second storage capacitor.

In one embodiment, the reset step includes a step in which the drivingtransistor is turned on such that the anode of the organic lightemitting diode (OLED) is connected to the driving voltage, and adifferent driving voltage input to a cathode of the organic lightemitting diode (OLED) is higher than the driving voltage.

In one embodiment, the compensation step includes a step in which thefirst storage capacitor is connected to the compensation capacitor, aset or predetermined voltage is input to a node at which the firststorage capacitor and the compensation capacitor are connected, and thedriving transistor is diode-connected.

In one embodiment, the reset step includes a step in which the firststorage capacitor and the compensation capacitor are connected, a set orpredetermined reference voltage is transmitted to the voltage of thenode at which the first storage capacitor and the compensation capacitorare connected, and the voltage of the gate electrode of the drivingtransistor is initialized by the reference voltage. In one embodiment,the reference voltage is at a level that turns on the drivingtransistor.

In one embodiment, the display device further includes another drivingvoltage connected to the cathode of the organic light emitting diode(OLED), and a voltage level of the other driving voltage during thereset step and compensation step is different than that during the lightemitting period.

A display device according to an embodiment of the present inventionincludes a plurality of pixels each including a driving transistor, afirst storage capacitor, and a second storage capacitor. A drivingmethod of the display device includes: programming first frame data tothe first storage capacitor of each of the plurality of pixels during afirst scan period; programming second frame data to the second storagecapacitor of each of the plurality of pixels during a second scanperiod; and emitting light through the plurality of pixels by a drivingcurrent flowing in the driving transistor of each of the plurality ofpixels according to the first frame data programmed to the first storagecapacitor during a first light emitting period, wherein the second scanperiod and the first light emitting period are temporally overlapped.

In one embodiment, the driving method of the display device furtherincludes a step in which the third frame data preceding the first frameis programmed to the second storage capacitor of each of the pluralityof pixels, and the plurality of pixels emit light during a second lightemitting period by a driving current flowing in the driving transistorof each of the plurality of pixels according to the third frame dataprogrammed to the second storage capacitor of each of the plurality ofpixels, and the second light emitting period and the first scan periodare temporally overlapped.

In one embodiment, the first frame data is first view point data, andthe second frame data is second view point data different from the firstview point.

A pixel of a display device according to an embodiment of the presentinvention includes: an organic light emitting diode (OLED); a drivingtransistor electrically connected to a first driving voltage andsupplying a driving current to the organic light emitting diode (OLED);a compensation capacitor including one electrode connected to the gateelectrode of the driving transistor; a first operation controltransistor including one electrode connected to the other electrode ofthe compensation capacitor and controlled by the first operation controlsignal; a second operation control transistor including one electrodeconnected to the other electrode of the compensation capacitor andcontrolled by the second operation control signal; a first storagecapacitor including one electrode connected to the other electrode ofthe first operation control transistor; and a second storage capacitorincluding one electrode connected to the other electrode of the secondoperation control transistor, wherein the second operation controltransistor is turned on such that the second storage capacitor and thecompensation capacitor are connected during a period in which the firstoperation control transistor is turned off such that the data voltage isstored to the first storage capacitor according to the correspondingdata signal.

In one embodiment, the pixel further includes a first switchingtransistor including one electrode connected to the one electrode of thefirst storage capacitor and the other electrode input with thecorresponding data signal and controlled by the first scan signal, and asecond switching transistor including one electrode connected to oneelectrode of the second storage capacitor and the other electrode inputwith the corresponding data signal and controlled by the second scansignal.

In one embodiment, the pixel further includes a compensation transistorconnected between the gate electrode and the drain electrode of thedriving transistor.

In one embodiment, the first switching transistor is turned on and thecompensation transistor is turned on during a compensation period.

In one embodiment, the first storage capacitor includes the otherelectrode connected to the first driving voltage, and the second storagecapacitor includes the other electrode connected to the first drivingvoltage.

In one embodiment, the first storage capacitor includes the otherelectrode connected to a set or predetermined reference voltagedifferent from the first driving voltage, and the second storagecapacitor includes the other electrode connected to the referencevoltage.

In one embodiment, the first driving voltage includes a second drivingvoltage and a third driving voltage, the second driving voltage and thethird driving voltage have the same waveform, and the pixel furtherincludes a first light emitting transistor connected between the seconddriving voltage and the driving transistor, and a second light emittingtransistor connected between the third driving voltage and the drivingtransistor.

In one embodiment, the pixel further includes a source of a fourthdriving voltage applied to a cathode of the organic light emitting diode(OLED), and the driving transistor is turned on during a reset periodand the first driving voltage has a lower level than the fourth drivingvoltage.

A display device according to an embodiment of the present inventionincludes: a plurality of data lines transmitting a plurality of datasignals; a plurality of first scan lines transmitting a plurality offirst scan signals; a plurality of second scan lines transmitting aplurality of second scan signals; a first operation control line and asecond operation control line transmitting a first operation controlsignal and a second operation control signal; a first voltage linetransmitting a first driving voltage and a second voltage linetransmitting a second driving voltage; and a plurality of pixels eachconnected to the corresponding data line, the corresponding first scanline, the corresponding second scan line, the first operation controlline, the second operation control line, the first voltage line, and thesecond voltage line, wherein the pixel includes an organic lightemitting diode (OLED) including a cathode connected to the secondvoltage line, a driving transistor connected to the first voltage linesupplying a driving current to the organic light emitting diode (OLED),a compensation capacitor connected to a gate electrode of the drivingtransistor, a first storage capacitor and a second storage capacitorconnected between the compensation capacitor and a source of the drivingvoltage, and wherein the display device is configured to provide: afirst period in which the first storage capacitor is connected to thecorresponding data line according to both the first scan signaltransmitted through the corresponding first scan line and the firstoperation control signal transmitted through the first operation controlline, and the compensation capacitor is blocked; and a second periodtemporally overlapped with the first period and in which the secondstorage capacitor is blocked from the corresponding data line and isconnected to the compensation capacitor according to both a second scansignal transmitted through the corresponding second scan line and thesecond operation control signal transmitted through the second operationcontrol line.

In one embodiment, the display device further includes a compensationcontrol line transmitting a compensation signal, and the pixel furtherincludes a compensation transistor connected between the gate electrodeand the drain electrode of the driving transistor and operated accordingto the compensation signal.

In one embodiment, during a reset period in which the compensationtransistor is turned on and the first driving voltage transmittedthrough the first voltage line is at a first level, the display deviceis configured to provide the second driving voltage level transmittedthrough the second voltage line that is different from the level of thesecond driving voltage during the first period and the second period. Inone embodiment, the first driving voltage is at a second level differentfrom the first level during the first period and the second period.

Embodiments of the present invention provide a pixel suitable for alarge size and high resolution display device that can display astereoscopic image, a display device including the same, and a drivingmethod thereof.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a view showing a case of driving all pixels of a display unitdivided into two groups.

FIG. 2 is a view of a motion artifact that may be generated in a displaydevice.

FIG. 3 is a view showing a driving method of a display device accordingto an exemplary embodiment of the present invention.

FIG. 4 is a view showing a display unit of a display device according toan exemplary embodiment of the present invention.

FIG. 5 is a view of a pixel structure according to an exemplaryembodiment of the present invention.

FIG. 6 is a view showing a driving waveform of a display deviceaccording to an exemplary embodiment of the present invention.

FIG. 7 is a view of a case when a stereoscopic image is displayedaccording to a simultaneous light emitting driving method according toan exemplary embodiment of the present invention.

FIG. 8 is a view of another pixel structure according to an exemplaryembodiment of the present invention.

FIG. 9 is a view of another pixel structure according to an exemplaryembodiment of the present invention.

FIG. 10 is a view of a display device according to an exemplaryembodiment of the present invention.

DETAILED DESCRIPTION

In the following detailed description, only certain exemplaryembodiments of the present invention have been shown and described,simply by way of illustration. As those skilled in the art wouldrealize, the described embodiments may be modified in various differentways, all without departing from the spirit or scope of the presentinvention. Accordingly, the drawings and description are to be regardedas illustrative in nature and not restrictive. Like reference numeralsdesignate like elements throughout the specification.

Throughout this specification and the claims that follow, when it isdescribed that an element is “coupled” to another element, the elementmay be “directly coupled” to the other element or “indirectly orelectrically coupled” to the other element through one or more thirdelements. In addition, unless explicitly described to the contrary, theword “comprise” and variations such as “comprises” or “comprising” willbe understood to imply the inclusion of stated elements, but not theexclusion of any other elements.

A display device according to an exemplary embodiment of the presentinvention is operated by a concurrent or simultaneous light emittingmethod. The concurrent or simultaneous light emitting method is a methodin which a plurality of pixels that are light-emitted during acorresponding frame, concurrently or simultaneously emit light such thatan image of one frame displayed by the display device is concurrently orsimultaneously displayed.

For concurrent or simultaneous light emitting by all pixels during thelight emitting period, data writing must be completed for all pixelsbefore the light emitting period. If the period of one frame is dividedinto a scan period for programming the data to all pixels and the lightemitting period, the scan period may be less than half of one frameperiod. Also, the light emitting period may be less than half of oneframe period.

To sufficiently obtain the light emitting period and the scan period,all pixels of the display device are divided into two groups, and twogroups may be alternatively operated with the scan period or the lightemitting period.

FIG. 1 is a view showing a case of driving all pixels of a display unitdivided into two groups.

A plurality of pixels of the display unit are divided into a pluralityof first group pixels emitting light during a first field and aplurality of second group pixels emitting light during a second field.The first field and the second field are display periods including atleast one frame, and one frame may sequentially include a reset period1, a compensation period 2, a scan period 3, and a light emitting period4.

The reset period 1 is a period for resetting an anode voltage of anorganic light emitting diode (OLED) by a discharge, and compensating athreshold voltage of the driving transistor of the pixel of thecompensation period 2.

Also, the first field EFD and the second field OFD are driven insynchronization with a time that is moved by a set or predeterminedperiod SF. In detail, one frame 1FO of the second field temporally closeto one frame 1FE of the first field EFD is temporally shifted by aperiod SF from the start of the one frame 1FE. The period SF is set upto not overlap the scan period 3. One frame 2FE of the first field iscontinuous after the frame 1FE, and one frame 2FO of the second field iscontinuous after the frame 1FO.

During the period 4 in which the first group pixels emit light, the scanperiod 3 in which the data signal respectively corresponding to thesecond group pixels is programmed. Likewise, during the period 4 inwhich the second group pixels emit the light, the scan period 3 in whichthe data signal respectively corresponding to the second group pixels isprogrammed, is generated. Accordingly, the scan period 3 may besufficiently obtained such that a temporal margin to drive the displaypanel is increased. Also, the scan frequency may be decreased such thatthe bandwidths of both a data driver generating and transmitting a datasignal to a data line, and a scan driver generating the scan signal, aredecreased, and resultantly the cost of circuit parts may be reduced.

As described above, when the pixels are divided into two groups and thefield in which each group emits light is divided and operated, thedisplay device may be manufactured with a large size and highresolution. Also, the display device is driven according to theconcurrent or simultaneous light emitting such that a motion blur may bereduced compared with the conventional art of sequentially emitting thelight according to the scan lines. In addition, when two groupsrespectively display the image of a set or predetermined view point, thedisplay device displays a screen of different view points for two groupssuch that a stereoscopic image display is possible.

However, to divide a plurality of pixels into two groups, a drivingvoltage must be divided and supplied to two groups, and a wire supplyingthe driving voltage must be separated. Also, the pixel circuit structureand wire structure may be complicated according to the arrangement ofthe first group pixels and the second group pixels. That is, the paneldesign may be complicated.

The data representing the image must also be mapped according to thearrangement of the first group pixels and the second group pixels suchthat the constitution and operation of a controller mapping the data maybe complicated.

In addition, since a time difference of the light emitting existsbetween the first group pixels and the second group pixels, when apattern is moved with a set or predetermined speed, the shape andarrangement in the panel of the first group pixels and the second grouppixels may be recognized as a pattern. This is referred to as a motionartifact.

FIG. 2 is a view of a motion artifact that may be generated in a displaydevice. FIG. 2 shows the motion artifact that may be generated when thefirst group pixels and the second group pixels are formed per pixel row.

As shown in FIG. 2, the arrangement of the first group pixels and thesecond group pixels is recognized. Thus, as shown in FIG. 2, the motionartifact in which the block edges of each group appear to be missingaccording to the arrangement of two groups may be generated.

Embodiments of the present invention provide a display device in whichthe operation of the light emitting period and the operation of the scanperiod are executed for a plurality of pixels, as a display devicedriven by the concurrent or simultaneous light emitting method. Thus,the scan period and the light emitting period may be sufficientlyobtained, and the above-described drawbacks such as the motion artifactgenerated in the display device in which the pixels are not divided intotwo groups may be reduced or prevented.

In addition, the scan and light emitting are executed together for eachpixel such that the display device of an embodiment of the presentinvention may extend the data writing period and the light emittingperiod.

Next, an exemplary embodiment of the present invention will be describedwith reference to FIG. 3.

FIG. 3 shows a driving method of a display device according to anexemplary embodiment of the present invention.

As shown in FIG. 3, one frame includes the reset period 1, thecompensation period 2, the scan period 3, and the light emitting period4. The scan period 3 and the light emitting period 4 are generated to betemporally overlapped.

The pixel emits light at the light emitting period 4 of the currentframe according to the data programmed at the scan period 3 of theprevious frame, and the pixel emits light at the light emitting period 4of the next frame according to the data programmed to the pixel at thescan period 3 of the current frame.

The period T1 includes the scan period 3 and the light emitting period 4of the N-th frame. Accordingly, the data programmed to the pixels at thescan period 3 of the period T1 is the data of the N-th frame, and thepixels emit light according to the data of the N-th frame programmed atthe scan period 3 of the (N−1)-th frame at the light emitting period 4of the period T1.

The period T2 includes the scan period 3 and the light emitting period 4of the (N+1)-th frame. Accordingly, the data programmed to the pixels atthe scan period 3 of the period T2 is the data of the (N+1)-th frame,and the pixels at the light emitting period 4 of the period T2 emit thelight according to the data of the N-th frame programmed at the scanperiod 3 (that is, the period T1) of the N-th frame.

In the scan period 3 of the periods T3 and T4, the data of the (N+2)-thframe and the data of the (N+3)-th frame are programmed to the pixels,and in the light emitting period 4 of the periods T3 and T4, the pixelsemit light according to both the data programmed at the scan period 3 ofthe (N+1)-th frame and the data programmed at the scan period 3 of the(N+2)-th frame.

A structure of the pixel in which (1) the data of the current frame isprogrammed during the scan period 3 and (2) the pixel is emitting lightaccording to the data of the previous frame and during the lightemitting period 4 that is temporally overlapped with the scan period 3will be described with reference to FIG. 4 and FIG. 5.

FIG. 4 is a view of a display unit 100 of a display device according toan exemplary embodiment of the present invention.

As shown in FIG. 4, the display unit 100 includes a plurality of firstscan lines SA1-SAn, a plurality of second scan lines SB1-SBn, aplurality of data lines data1-datam, a first voltage line 101, a secondvoltage line 102, a compensation control line 103, a first operationcontrol line 104, and a second operation control line 105.

The plurality of first scan lines SA1-SAn respectively extend in atransverse direction, and are respectively connected to a plurality ofpixels PX of one row. The plurality of second scan lines SB1-SBnrespectively extend in the transverse direction, and are respectivelyconnected to a plurality of pixels PX of one row.

The plurality of data lines data1-datam extend in a longitudinaldirection, and intersect or cross the transverse direction of theplurality of first scan lines SA1-SAn and the plurality of second scanlines SB1-SBn. The plurality of data lines data1-datam are eachconnected to a plurality of pixels PX of one column.

The first voltage line 101 is a wire for transmitting a driving voltageELVDD to a plurality of pixels PX. The first voltage line 101 may beconnected to a plurality of pixels PX. In FIG. 4, as one example, thefirst voltage line 101 is formed with a plurality of wires formed in thelongitudinal direction and with one connection wire connecting them.

The second voltage line 102 is a wire for transmitting a driving voltageELVSS to a plurality of pixels PX. The second voltage line 102 may bealso connected to a plurality of pixels PX. In FIG. 4, as one example,the second voltage line 101 includes a plurality of wires formed in thelongitudinal direction and one connection wire connecting them.

The compensation control line 103 is a wire for transmitting acompensation control signal GC to a plurality of pixels PX. Thecompensation control line 103 may also be connected to a plurality ofpixels PX. In FIG. 4, as one example, the compensation control line 103includes a plurality of wires formed in the transverse direction and oneconnection wire connecting them.

The first operation control line 104 is a wire for transmitting thefirst operation control signal MA to a plurality of pixels PX. The firstoperation control line 104 may be connected to a plurality of pixels PX.In FIG. 4, as one example, the first operation control line 104 includesa plurality of wires formed in the transverse direction and oneconnection wire connecting them.

The second operation control line 105 is a wire for transmitting thesecond operation control signal MB to a plurality of pixels PX. Thesecond operation control line 105 may be connected to a plurality ofpixels PX. In FIG. 4, as one example, the second operation control line105 includes a plurality of wires formed in the transverse direction andone connection wire connecting them.

A plurality of pixels PX are respectively connected to a correspondingdata line of a plurality of data lines, a corresponding first scan lineof a plurality of first scan lines, a corresponding second scan line ofa plurality of second scan lines, two driving voltage lines, thecompensation control line, the first operation control line, and thesecond operation control line.

Next, the pixel structure will be described with reference to FIG. 5.

FIG. 5 is a view of a pixel structure according to an exemplaryembodiment of the present invention. The pixel PX shown in FIG. 5 is apixel connected to the first scan line SAi, the second scan line SBi,and the data line dataj. The other pixels are the same as the pixelshown in FIG. 5.

As shown in FIG. 5, the pixel includes six transistors TD, TSA, TSB,TMA, TMB, and TGC, two storage capacitors CA and CB, a compensationcapacitor CTH, and an organic light emitting diode (OLED).

The driving voltage ELVDD and the driving voltage ELVSS for operatingthe pixel are supplied to both terminals to which the driving transistorTD and the organic light emitting diode (OLED) are connected in series.

The six transistors TD, TSA, TSB, TMA, TMB, and TGC shown in FIG. 5 areP-channel-type transistors. However, the present invention is notlimited thereto, and the channel type of each transistor is determinedaccording to the signal level input to the gate electrode of eachtransistor and the operation state of each transistor according to thesignal level.

The driving transistor TD includes the source electrode connected to thedriving voltage ELVDD, the drain electrode connected to the anode of theorganic light emitting diode (OLED), and the gate electrode connected tothe compensation capacitor CTH.

The compensation transistor TGC includes both electrodes respectivelyconnected to the gate electrode and the drain electrode of the drivingtransistor TD, and the gate electrode input with the compensationcontrol signal GC. The compensation transistor TGC diode-connects thedriving transistor TD of the compensation period 2.

The compensation capacitor CTH includes one electrode connected to thegate electrode of the driving transistor TD, and the other electrodeconnected to each one electrode of two transistors TMA and TMB.

The first operation control transistor TMA includes the gate electrodeinput with the first operation control signal MA, one electrodeconnected to the other electrode of the compensation capacitor CTH, andthe other electrode connected to both one electrode of the firstswitching transistor TSA and one electrode of the storage capacitor CA.

The first switching transistor TSA includes the gate electrode inputwith the scan signal SA[i], one electrode connected to both the otherelectrode of the first operation control transistor TMA and the oneelectrode of the capacitor CA, and the other electrode connected to thedata line dataj.

The second operation control transistor TMB includes the gate electrodeinput with the first operation control signal MB, one electrodeconnected to the other electrode of the compensation capacitor CTH, andthe other electrode connected to both one electrode of the firstswitching transistor TSB and one electrode of the storage capacitor CB.

The second switching transistor TSB includes the gate electrode inputwith the scan signal SB[i], one electrode connected to both the otherelectrode of the second operation control transistor TMB and the oneelectrode of the storage capacitor CB, and the other electrode connectedto the data line dataj.

The other electrode of the storage capacitor CA is connected to thevoltage ELVDD, and the other electrode of the storage capacitor CB isconnected to the voltage ELVDD.

The pixel shown in FIG. 5 includes the first path driving the drivingtransistor TD according to the data signal programmed to the storagecapacitor CA, and the second path driving the driving transistor TDaccording to the data signal programmed to the storage capacitor CB.

The switch controlling a connection and a disconnection of the firstpath is the transistor MA, and the switch controlling the connection andthe disconnection of the second path is the transistor MB. Thetransistor MA is controlled by the first operation control signal MA,and the transistor MB is controlled by the second operation controlsignal MB.

FIG. 6 is a view showing a driving waveform of a display deviceaccording to an exemplary embodiment of the present invention.

As shown in FIG. 6, the driving voltages ELVDD and ELVSS, the first scansignals SA[1]-SA[n], the second scan signals SB[1]-SB[n], the firstoperation control signal MA, the second operation control signal MB, thedata signals data[1]-data[m], and the compensation control signal GC arechanged according to the reset period 1, the compensation period 2, thescan period 3, and the light emitting period 4.

In FIG. 6, an initialization period INIT is further included before thereset period 1 of each frame. The reset period according to an exemplaryembodiment of the present invention further includes the initializationperiod. The initialization operation may be omitted according to thecharacteristics of the display panel.

During the period in which the first scan signals SA[1]-SA[n] are at theenable ENABLE level among the initialization period INIT, the datasignals data[1]-data[m] are changed into the reference voltage forinitializing the node ND. The first switching transistor TSA is theP-channel type such that the enable ENABLE level of the first scansignals SA[1]-SA[n] is the low level.

The level of the reference voltage is set as a level to improve theresponse waveform of the organic light emitting diode (OLED).

The response waveform of the organic light emitting diode (OLED) isaffected by a hysteresis characteristic of the driving transistor TDsupplying the driving current to the organic light emitting diode(OLED). For example, in the characteristic curve between the draincurrent and the gate-source voltage of the driving transistor, adifference between the drain current of the direction that thegate-source voltage is increased and the drain current of the directionthat the gate-source voltage is decreased, is generated. This phenomenonis the hysteresis characteristic of the driving transistor.

For the same data signal, if the current flowing to the organic lightemitting diode (OLED) when the organic light emitting diode (OLED) ischanged from high luminance to low luminance, and the current flowing tothe organic light emitting diode (OLED) when the organic light emittingdiode (OLED) is changed from low luminance to high luminance aredifferent, then a motion blur is generated. This means that the responsewaveform of the organic light emitting diode (OLED) is affected in acase of receiving influence by the hysteresis characteristic.

The initialization period is to eliminate the hysteresis characteristicby initializing the voltage of the gate electrode of the drivingtransistor.

The transistors in an exemplary embodiment of the present invention areall the P-channel type such that the enable level is the low levelcapable of fully turning on the transistor of the P-channel type. Incontrast, the disable level is the high level capable of fully turningoff the transistor of the P-channel type.

In an exemplary embodiment of the present invention, the referencevoltage is set up as the voltage of the low level, however it may bechanged according to the channel type of the driving transistor. Thatis, when the driving transistor is the N-channel type, the referencevoltage may be set up as the voltage of the high level.

In the initialization period INIT, during the period in which the firstscan signal SA[1]-SA[n] is the enable level and the first operationcontrol signal MA is the enable level, the first switching transistorTSA and the first operation control transistor TMA are turned on suchthat the data signals data[1]-data[m] are transmitted to the node ND.Here, the data signals data[1]-data[m] are the reference voltage of thelow level such that the voltage of the node ND is decreased and the gatevoltage of the driving transistor TD is decreased.

The voltage of the node ND of each of all pixels is decreased to thereference voltage at the initialization period INIT such that the gatevoltage of the driving transistor TD of each of all pixels is decreasedby the decreasing voltage of the node ND to become the low voltage atthe low level, and thereby the driving transistor TD is turned on. Atthis time, the driving voltage ELVSS is the high level such that thecurrent does not flow to the organic light emitting diode (OLED) and thelight is not emitted.

If the driving voltage ELVDD becomes the low level in the reset period1, the anode voltage of the organic light emitting diode (OLED) is resetto the driving voltage (ELVDD) level through the driving transistor TDof the on state. In the reset period 1, the first scan signalsSA[1]-SA[n] are the disable level such that the first switchingtransistor TSA is in the turned off state.

If the compensation control signal GC becomes the low level at the timepoint T11 among the reset period 1, the compensation transistor TGC isturned on, and thereby the gate electrode of the driving transistor TDand the anode of the organic light emitting diode (OLED) are connected.

If the driving voltage ELVDD becomes the high level in the compensationperiod 2, the gate electrode and the drain electrode of the drivingtransistor TD are connected by the compensation transistor TGC of the onstate. That is, the driving transistor TD is diode-connected. Thus, thecurrent flows through the diode-connected driving transistor TD. At thistime, the driving voltage ELVSS is the high level such that the currentdoes not flow to the organic light emitting diode (OLED) and the lightis not emitted.

In the compensation period 2, the first scan signals SA[1]-SA[n] are allat the low level and the first switching transistor TSA is turned on,and thereby the data signals data[1]-data[m] are transmitted to the nodeND. The voltage of the data signals data[1]-data[m] of the compensationperiod 2 is referred to as an assistance voltage VSUS. In an exemplaryembodiment of the present invention, the assistance voltage VSUS is setup as 10V, and the driving voltage ELVDD is set up as 12V in thecompensation period 2, however the present invention is not limitedthereto.

The voltage of the node NG is ELVDD+VTH (the threshold voltage of thedriving transistor TD) by the diode-connected driving transistor TD, andthe voltage of the node ND is VSUS such that the voltage ELVDD+VTH−VSUSis stored to the compensation capacitor CTH.

If the compensation control signal GC becomes the high level, then thecompensation transistor TGC is turned off, and the voltage of the nodeND and the node NG is maintained by the capacitor CA and thecompensation capacitor CTH that is connected to the compensationcapacitor CTH in series.

The scan period 3 and the light emitting period 4 concurrently orsimultaneously progress after the compensation period 2. The drivingcurrent following to the data signal programmed to the pixel PX duringthe scan period of the previous frame (the (N−1)-th frame, not shown) ofthe N-th frame is generated such that the organic light emitting diode(OLED) emits the light. The data signals data[1]-data[m] transmitted toa plurality of pixels PX during the scan period of the (N−1)-th frame isstored to the capacitor CB.

A plurality of data signals data[1]-data[m] are sequentially transmittedto a plurality of pixels PX during the N-th frame scan period 3. Thedata signal data[1]-data[m] programmed at the N-th frame is stored tothe capacitor CA.

After the compensation period 2 is finished, the driving voltage ELVSSis decreased from the high level 10V to the low level 0V, the firstoperation control signal MA is changed from the low level to the highlevel, and the second operation control signal MB is changed from thehigh level to the low level. The first operation control signal MA andthe second operation control signal MB are inverse, and the levels ofthe two operation control signals MA and MB are changed every frame atthe scan period 3 and the light emitting period 4.

During the scan period 3 and light emitting period 4, the light emittingis operated by the operation control signal turning on either the firstoperation control transistor TMA or the second operation controltransistor TMB, and the scan operation is executed by the operationcontrol signal turning off either the first operation control transistorTMA or the second operation control transistor TMB.

In FIG. 6, as an example, during the scan period 3 and the lightemitting period 4 of the N-th frame, the first operation control signalMA is at the high level turning off the first operation controltransistor TMA such that the scan operation in which the data signaldata[1]-data[m] of the N-th frame is programmed to the storage capacitorCA is executed. Also, the second operation control signal MB is at thelow level turning on the second operation control transistor TMB suchthat the driving transistor TD controls the driving current according tothe data signal stored to the storage capacitor CB, and the lightemitting operation in which the organic light emitting diode (OLED)emits the light by the driving current is executed.

Firstly, the light emitting operation of the N-th frame is described.The second operation control signal MB is the low level such that thesecond operation control transistor TMB is turned on, and then the nodeND is connected to the storage capacitor CB. The storage capacitor CB isstored with the data signal of the previous (N−1)-th frame.

The data signal stored to the storage capacitor CB is applied to thenode ND by the turn-on of the second operation control transistor TMB.The parasitic capacitor CP of the driving transistor TD (not shown) andthe compensation capacitor CTH are connected in series such that thecapacitor of the driving transistor for the node ND is the capacitorCX(CTH*CP/(CTH+CP)) of which the compensation capacitor CTH and theparasitic capacitor CP are connected in series.

The capacitor CX and the capacitor CB are connected in the lightemitting period 4 in series, and the voltage VDT of the node ND by thecharge sharing of two capacitors is as in the following Equation 1.

VDT=a*Vdata  Equation 1

Here, a is equal to CB/CB+CX. Capacitances of the capacitor CB and thecapacitor CX are represented by “CB” and “CX”, respectively. The Vdatais equal to the voltage stored to the capacitor CB according to the datasignal of the previous (N−1)-th frame.

The voltage stored to the capacitor CB is changed according to thecharge sharing of two capacitors, and the node ND is changed to thevoltage VDT. The node ND and the gate electrode NG are coupled by thecapacitor CTH, and the voltage of the gate electrode NG is also changedto the voltage ELVDD+VTH−VSUS+VDT according to the voltage changeVDT−VSUS of the node ND.

The driving current IOLED supplied to the organic light emitting diode(OLED) through the driving transistor VD during the light emittingperiod 4 is as in the following Equation 2.

IOLED=k(VGS−VTH)̂2=k((ELVDD+VTH−VSUS+VDT)−ELVDD−VTH)̂2=k(VDT−VSUS)̂2  Equation2

Here, k is equal to a constant determined according to an inherentparameter of the driving transistor TD.

As shown in Equation 2, the driving current IOLED is not influenced bythe threshold voltage of the driving transistor and the driving voltageELVDD. Accordingly, the driving current is not influenced by thethreshold voltage deviation between the driving transistors and thevoltage drop IR-DROP generated in the wire supplying the drivingvoltage, and is determined according to the data signal.

Next, the scan period 3 is described.

The capacitor CA blocked with the node ND by the first operation controlsignal MA is programmed with the data signal of the N-th frame duringthe scan period 3. The voltage of the node ND of the light emittingperiod 4 of the next (N+1)-th frame is determined according to thevoltage stored to the capacitor CA during the scan period 3, and thevoltage of the gate electrode NG of the driving transistor TD isdetermined.

A plurality of first scan signals SA[1]-SA[m] become the pulse signalsof the low level that is sequentially the enable level during the scanperiod 3. Thus, the first switching transistor TSA of a plurality ofpixels connected to the scan line supplied with the first scan signalsSA[1]-SA[m] of the low level pulse is turned on, and the correspondingdata signal among a plurality of data signals data[1]-data[m] is storedto the capacitor CA through the turned-on first switching transistorTSA.

As described above, the N-th frame is finished, and the next (N+1)-thframe is started. During the initialization period INIT, the resetperiod 1, and the compensation period 2 of the (N+1)-th frame, thesecond operation control transistor TMB is in the turn-on state, and thefirst operation control transistor TMA is in the turn-off state.

As shown in FIG. 6, during the light emitting period 4 of the N-thframe, and the initialization period INIT, the reset period INIT, andthe compensation period INIT of the (N+1)-th frame, the second operationcontrol signal MB is at the low level of the enable level, and the firstoperation control signal MA is at the high level of the disable level.

As the signals alternately having the enable level and the disablelevel, the first operation control signal MA and the second operationcontrol signal MB are operated at the same frequency, and have a phasedifference of one frame.

The initialization period INIT and the compensation period 2 of the(N+1)-th frame are executed through the second operation controltransistor TMB differently from the N-th frame. Also, the secondoperation control signal MB is at the disable level and the scanoperation is executed to the capacitor CB during the scan period 3 ofthe (N+1)-th frame. Also, the first operation control signal MA becomesthe enable level during the light emitting period 4 of the (N+1)-thframe, and a plurality of pixels PX emit the light according to aplurality of data signals programmed during the scan period 3 of theN-th frame.

In the initialization period INIT, since the first scan signalsSB[1]-SB[n] are the enable level and the second operation control signalMB is the enable level, the second switching transistor TSB and thesecond operation control transistor TMB are turned on such that the datasignals data[1]-data[m] are transmitted to the node ND. Here, the datasignals data[1]-data[m] are the reference voltage of the low level suchthat the voltage of the node ND is initialized to the reference voltageand the gate voltage of the driving transistor TD is decreased.

The voltage of the node ND of each of all pixels is decreased to thereference voltage at the initialization period INIT such that the gatevoltage of the driving transistor TD of each of all pixels is decreasedby the decreasing voltage of the node ND to become the low voltage atthe low level. The driving voltage ELVSS is the high level such that thecurrent does not flow to the organic light emitting diode (OLED), andthe light is not emitted.

If the driving voltage ELVDD is at the low level in the reset period 1,the anode voltage of the organic light emitting diode (OLED) is reset tothe driving voltage ELVDD level through the on state of the drivingtransistor TD. The first scan signals SB[1]-SB[n] are the disable levelin the reset period 1 such that the second switching transistor TSB isin the turn-off state.

If the compensation control signal GC is at the low level at the timepoint T12 of the reset period 1, the compensation transistor TGC isturned on such that the gate electrode of the driving transistor TD isconnected to the anode of the organic light emitting diode (OLED).

If the driving voltage ELVDD is at the high level in the compensationperiod 2, the driving transistor TD is diode-connected. Thus, thecurrent flows through the diode-connected driving transistor TD. Here,the driving voltage ELVSS is at the high level such that the currentdoes not flow to the organic light emitting diode (OLED) and the lightis not emitted.

In the compensation period 2, the first scan signals SB[1]-SB[n] are allat the low level and the second switching transistor TSB is turned onsuch that the data signals data[1]-data[m] are transmitted to the nodeND. The data signals data[1]-data[m] of the compensation period 2 are atthe assistance voltage VSUS. The voltage of the node NG is ELVDD+VTH bythe diode-connected driving transistor TD, and the voltage of the nodeND is the assistance voltage VSUS such that the voltage ELVDD+VTH−VSUSis stored to the compensation capacitor CTH.

The scan period 3 and the light emitting period 4 are currently orsimultaneously processed after the compensation period 2. The drivingcurrent following the data signal programmed to the pixel PX during thescan period 3 of the previous N-th frame of the (N+1)-th frame isgenerated such that the organic light emitting diode (OLED) emits thelight and a plurality of data signals data[1]-data[m] of the (N+1)-thframe are sequentially programmed to a plurality of pixels PX. The datasignals data[1]-data[m] transmitted at the (N+1)-th frame are stored tothe capacitor CB.

After the compensation period 2 is finished, the driving voltage ELVSSis decreased from the high level 10V to the low level 0V, the secondoperation control signal MB is changed from the low level to the highlevel, and the first operation control signal MA is changed from thehigh level to the low level.

During the scan period 3 and the light emitting period 4 of the (N+1)-thframe, the second operation control signal MB is at the high levelturning off the second operation control transistor TMB such that thescan operation in which the data signals data[1]-data[m] of the (N+1)-thframe are programmed to the storage capacitor CB is executed. Also, thefirst operation control signal MA is at the low level turning on thefirst operation control transistor TMA such that the driving transistorTD controls the driving current according to the data signal stored tothe storage capacitor CA, and the light emitting operation in which theorganic light emitting diode (OLED) emits the light by the drivingcurrent is executed.

Firstly, the light emitting operation of the (N+1)-th frame isdescribed. The first operation control signal MA is the low level suchthat the first operation control transistor TMA is turned on and thenode ND is connected to the storage capacitor CA. The storage capacitorCA is stored with the data signal of the previous N-th frame.

The data signal stored to the storage capacitor CA is applied to thenode ND by the turn-on of the first operation control transistor TMA.Like the above Equation 1, the voltage VDT of the node ND is equal toa*Vdata. Here, a is equal to CB/CB+CX, and Vdata is the voltage storedto the capacitor CA according to the data signal of the previous N-thframe. Also, the voltage of the gate electrode NG is changed to thevoltage ELVDD+VTH−VSUS+VDT according to the voltage change VDT−VSUS ofthe node ND. The driving current IOLED supplied to the organic lightemitting diode OLED through the driving transistor VD during the lightemitting period 4 may be represented as Equation 2.

Next, the scan period 3 is described.

The capacitor CB blocked from the node ND by the second operationcontrol signal MB is programmed with the data signal of the (N+1)-thframe during the scan period 3. A plurality of second scan signalsSB[1]-SB[m] sequentially become the low level pulse signal of the enablelevel during the scan period 3. Thus, the second switching transistorTSB of each of a plurality of pixels connected to the scan line suppliedwith the second scan signals SB[1]-SB[m] of the low level pulse isturned on, and the corresponding data signal of a plurality of datasignals data[1]-data[m] is stored to the capacitor CB through theturned-on second switching transistor TSB.

This operation is repeated, and thereby the scan period 3 and the lightemitting period 4 are concurrently or simultaneously executed.

The concurrent or simultaneous light emitting driving method accordingto an exemplary embodiment of the present invention is furtherappropriate to display a stereoscopic image compared with a conventionalart.

FIG. 7 shows a case that a stereoscopic image is displayed according toa concurrent or simultaneous light emitting driving method according toan exemplary embodiment of the present invention.

The display device displays a left-eye image and a right-eye image torealize the stereoscopic image. There is a method using shutter glassesamong methods of displaying the left-eye image and the right-eye image.The left eye lens of the shutter glasses is opened during a period thatthe left-eye image is displayed and the right eye lens is closed duringthis period. The right eye lens of the shutter glasses is opened duringthe period that the right-eye image is displayed and the left eye lensis closed during this period.

FIG. 7 shows a method that the display device displays the left-eyeimage and the right-eye image according to the shutter glasses method.As shown in FIG. 7, each frame includes the reset period 1, thecompensation period 2, the scan period 3, and the light emitting period4.

In FIG. 7, the frame in which a plurality of data signals (hereinafterreferred to as left eye image data signals) representing the left-eyeimage are respectively programmed to a plurality of pixels is indicatedby a reference numeral “L”, and the frame in which a plurality of datasignals (hereinafter referred to as right eye image data signals)representing the right-eye image are respectively programmed to aplurality of pixels is indicated by a reference numeral “R”.

The waveform of the driving voltage, the scan signal, the compensationcontrol signal, and the operation control signal of the reset period 1,the compensation period 2, the scan period 3, and the light emittingperiod 4 is the same as the waveform shown in FIG. 6. The descriptionfor each period is omitted.

The left eye image data signal of the N_L frame is transmitted to aplurality of pixels during the scan period 3 of the period T21. Duringthe scan period 3, the left eye image data signals corresponding to theplurality of pixels PX are programmed. At this time, a plurality ofpixels emit the light according to the right eye image data signalsprogrammed at the scan period 3 of the N−1_R frame during the lightemitting period 4 of the period T21.

The right eye image data signal of the N_R frame is transmitted to aplurality of pixels at the scan period 3 of the period T22.

The right eye image data signal respectively corresponding to theplurality of pixels PX is programmed during the scan period 3. At thistime, a plurality of pixels emit the light according to the left eyeimage data signal programmed at the scan period 3 of the N_L frameduring the light emitting period 4 of the period T22.

The left eye image data signal of the N+1_L frame is transmitted to aplurality of pixels at the scan period 3 of the period T23. The eyeimage data signal respectively corresponding to a plurality of pixels PXis programmed during the scan period 3. At this time, a plurality ofpixels emit the light according to the right eye image data signalprogrammed at the scan period 3 of the N_R frame during the lightemitting period 4 of the period T23.

The right eye image data signal of the N+1_R frame is transmitted to aplurality of pixels at the scan period 3 of the period T24. The righteye image data signal respectively corresponding to a plurality ofpixels PX is programmed during the scan period 3. Here, a plurality ofpixels emit the light according to the left eye image data signalprogrammed in the scan period 3 of the N+1_L frame during the lightemitting period 4 of the period T24.

By this method, the light due to the right-eye image is concurrently orsimultaneously emitted during the period that the left-eye image isprogrammed, and the light due to the left-eye image is concurrently orsimultaneously emitted during the period that the right-eye image isprogrammed. Thus, a sufficient light emitting period may be obtained,and thereby the image quality of the stereoscopic image is improved.

The scan period 3 and the light emitting period 4 are included in thesame period such that the interval T31 between the light emitting period4 of each frame may be set up regardless of the scan period. Here, theinterval between the light emitting period 4 may be set up as aninterval that is desired in consideration of the response speed of theliquid crystal of the shutter glasses.

In a conventional case in which the scan period 3 and the light emittingperiod 4 are not included in the same period, the light emitting period4 is disposed after the scan period 3 such that the temporal margin atwhich the light emitting period 4 may be set up among the period of oneframe is small. According to an exemplary embodiment of the presentinvention, the light emitting period 4 may be set up in the periodexcept for the reset period and the compensation period among the periodof one frame, or in the period except for the initialization period,reset period, and compensation period of one frame. Accordingly, thetemporal margin that is capable of setting up the light emitting period4 is increased compared with the conventional case, and thereby theinterval between the light emitting periods 4 may be set up whenconsidering the liquid crystal response speed of the shutter glasses.

For example, the interval T31 between the light emitting periods 4 maybe set up when considering the time that the right eye lens (or the lefteye lens) of the shutter glasses is completely opened from the viewpoint that the light emitting of the left-eye image (or the right-eyeimage) is finished.

Next, various pixel structures applied with the concurrent orsimultaneous light emitting method according to an exemplary embodimentof the present invention will be described with reference to FIGS. 8 and9.

FIG. 8 is a view of another pixel structure according to an exemplaryembodiment of the present invention.

A pixel PX′ shown in FIG. 8 further includes a reference voltagecompared with the pixel PX shown in FIG. 5. The storage capacitor CA andthe storage capacitor CB are connected to the reference voltage VREFinstead of the driving voltage ELVDD.

The scan period 3 and the light emitting period 4 are concurrently orsimultaneously generated such that the voltage drop IR-DROP of thedriving voltage ELVDD may be influenced by the data writing of the scanperiod 3 during the light emitting period 4.

For example, during the period that the data signal data[j] isprogrammed to the pixel PX′ such that the voltage according to the datasignal data[j] is stored to the storage capacitor CA, if the drivingvoltage ELVDD is decreased to the voltage drop, the voltage stored tothe storage capacitor CA is decreased. To prevent this, the referencevoltage VREF that is different from the driving voltage ELVDD may beused.

The storage capacitor CA includes one electrode connected to both thefirst switching transistor TSA and the first operation controltransistor TMB, and the other electrode connected to the referencevoltage VREF.

The storage capacitor CB includes one electrode connected to both thesecond switching transistor TSB and the second operation controltransistor TMB, and the other electrode connected to the referencevoltage VREF.

FIG. 9 is a view of another pixel structure according to an exemplaryembodiment of the present invention.

Compared with the pixel PX shown in FIG. 5, in the pixel PX″ shown inFIG. 9, the storage capacitor CA and the storage capacitor CB arerespectively connected to the driving voltage ELVDD_A and the drivingvoltage ELVDD_B, and the driving transistor TD is alternately connectedto the driving voltage ELVDD_A and the driving voltage ELVDD_B throughthe first light emitting transistor ETA and the second light emittingtransistor ETB. The driving voltage ELVDD_A and the driving voltageELVDD_B are the voltages having the same waveform.

The storage capacitor CA includes one electrode connected to both thefirst switching transistor TSA and the first operation controltransistor TMA, and the other electrode connected to the driving voltageELVDD_A. The storage capacitor CB includes one electrode connected toboth the second switching transistor TSB and the second operationcontrol transistor TMB, and the other electrode connected to the drivingvoltage ELVDD_B.

The first light emitting transistor ETA is connected between the drivingvoltage ELVDD_A and the driving transistor TD, and the on/off thereof iscontrolled by the first operation control signal MA. The first lightemitting transistor ETA includes the gate electrode input with the firstoperation control signal MA, the source electrode connected to thedriving voltage ELVDD_A, and the drain electrode connected to the sourceelectrode of the driving transistor TD.

The second light emitting transistor ETB is connected between thedriving voltage ELVDD_B and the driving transistor TD, and the on/offthereof is controlled by the second operation control signal MB. Thesecond light emitting transistor ETB includes the gate electrode inputwith the second operation control signal MB, the source electrodeconnected to the driving voltage ELVDD_B, and the drain electrodeconnected to the source electrode of the drain driving transistor TD.

If the first light emitting transistor ETA is turned on by the firstoperation control signal MA, then the driving transistor TD is connectedto the driving voltage ELVDD_A. Here, the driving transistor TDgenerates the driving current according to the voltage differencebetween the driving voltage ELVDD_A and the gate electrode during thelight emitting period 4.

If the second light emitting transistor ETB is turned on by the secondoperation control signal MB, then the driving transistor TD is connectedto the driving voltage ELVDD_B. Here, the driving transistor TDgenerates the driving current according to the voltage differencebetween the driving voltage ELVDD_B and the gate electrode during thelight emitting period 4.

As described above, using two driving voltages ELVDD_A and ELVDD_Bobtains the same effect as using the reference voltage VREF. That is,the driving voltage connected to the driving transistor TD and thedriving voltage connected to the capacitor to which the data writing isexecuted among the capacitor CA and the capacitor CB, are different fromeach other during the period that the organic light emitting diode(OLED) emits the light.

For example, during the period that the driving transistor TD isconnected to the driving voltage ELVDD_B and the driving current issupplied to the organic light emitting diode (OLED), the voltageaccording to the data signal is stored to the capacitor CA. Here, thedriving voltage ELVDD_A is connected to the capacitor CA. As describedabove, the driving voltage for the light emitting operation and thedriving voltage for the data writing operation are divided such that thevoltage drop IR-drop by the light emitting is not generated among thedata writing operation, thereby obtaining luminance uniformity of thescreen.

Next, a constitution of a display device according to an exemplaryembodiment of the present invention will be described with reference toFIG. 10. FIG. 10 is a view of a display device according to an exemplaryembodiment of the present invention.

As shown in FIG. 10, the display device 10 includes an image processingunit 700, a timing controller 200, a data driver 300, a scan driver 400,a power source controller 500, a compensation control signal unit 600,and a display unit 100.

The image processing unit 700 generates a video signal ImS and asynchronization signal from an input signal InS. The synchronizationsignal includes a horizontal synchronization signal Hsync, a verticalsynchronization signal Vsync, and a main clock signal CLK.

The image processing unit 700 divides the left-eye image signalrepresenting the left eye picture and the right eye video signalrepresenting the right eye picture as the frame unit when the signal(hereinafter, image source signal) representing the image included inthe input signal InS is the signal representing the stereoscopic image.The image processing unit 700 arranges the left-eye image signal and theright eye image signal according to the vertical synchronization and thehorizontal synchronization to generate the video signal ImS.

When the image source signal is the signal representing the plane image,the image processing unit 700 divides the image source signal as theframe unit and arranges the image source signal according to thevertical synchronization and the horizontal synchronization to generatethe video signal ImS.

The main clock signal CLK may be a clock signal having a basic frequencyincluded in the image source signal, or may be one of clock signalsappropriately generated according to the necessity of the imageprocessing unit 700.

The timing controller 200 generates first to fourth driving controlsignals CONT1-CONT4 and the image data signal ImD according to the videosignal ImS, the vertical synchronization signal Vsync, the horizontalsynchronization signal Hsync, and the main clock signal CLK.

The timing controller 200 divides the video signal ImS as the frame unitaccording to the vertical synchronization signal Vsync and divides thevideo signal ImS as the scan line unit according to the horizontalsynchronization signal Hsync to generate the image data signal ImD andtransmit it to the data driver 300 along with the first driving controlsignal CONT1.

The data driver 300 samples and holds the image data signal ImD inputaccording to the first driving control signal CONT1, and respectivelytransmits a plurality of data signals data[1]-data[m] to a plurality ofdata lines.

The scan driver 400 generates a plurality of first scan signalsSA[1]-SA[n], a plurality of second scan signals SB[1]-SB[n], the firstoperation control signal MA, and the second operation control signal MBaccording to the second driving control signal CONT2, and transmits themto the corresponding scan line during the initialization period INIT,the reset period 1, the compensation period 2, the scan period 3, andthe light emitting period 4 of each frame.

The power source controller 500 determines the level of the drivingvoltages ELVDD and ELVSS during the initialization period INIT, thereset period 1, the compensation period 2, the scan period 3, and thelight emitting period 4 according to the third driving control signalCONT3, and supplies them to the power line. When applying the pixelstructure according to FIG. 9, two driving voltages ELVDD_A and ELVDD_Bare generated from the power source controller 500 and are supplied tothe display unit 100.

The compensation control signal unit 600 determines the level of thecompensation control signal GC during the initialization period INIT,the reset period 1, the compensation period 2, the scan period 3, andthe light emitting period 4 according to the fourth driving controlsignal CONT4 and supplies them to the control signal line.

The display unit 100 was described above with reference to FIG. 4.

In view of the foregoing, an embodiment of the present inventionprovides a display device including a pixel including an organic lightemitting diode (OLED), a driving transistor connected to the drivingvoltage and supplying a driving current to the organic light emittingdiode (OLED), a compensation capacitor connected to the gate electrodeof the driving transistor, and a first storage capacitor and a secondstorage capacitor electrically connected to or blocked from thecompensation capacitor, and a driving method thereof. In one embodiment,an anode voltage of the organic light emitting diode (OLED) isdischarged to be reset, and a threshold voltage of the drivingtransistor is stored to the compensation capacitor. The data voltage isstored to the first storage capacitor according to the correspondingdata signal, and the organic light emitting diode (OLED) emits lightaccording to the driving current flowing to the driving transistor bythe data voltage stored to the second storage capacitor. Here, theorganic light emitting diode (OLED) of each of a plurality of pixelsemits the light by the corresponding driving current during the samelight emitting period. In addition, a step that the data voltage isstored and a step that the organic light emitting diode (OLED) emits thelight are temporally overlapped.

While this invention has been described in connection with what ispresently considered to be practical exemplary embodiments, it is to beunderstood that the invention is not limited to the disclosedembodiments, but, on the contrary, is intended to cover variousmodifications and equivalent arrangements included within the spirit andscope of the appended claims.

DESCRIPTION OF SYMBOLS

reset period 1, compensation period 2, scan period 3, light emittingperiod 4

first scan lines SA1-SAn, second scan lines SB1-SBn

data lines data1-datam, first voltage line 701, second voltage line 702

compensation control line 703, first operation control line 704, secondoperation control line 705

driving transistor TD, first switching transistor TSA

second switching transistor TSB, first operation control transistor TMA

second operation control transistor TMB, compensation transistor TGC

storage capacitor CA, CB, compensation capacitor CTH, organic lightemitting diode OLED

driving voltage ELVDD, ELVSS, ELVDD_A, ELVDD_B, pixel PX, PX′, PX″

image processing unit 700, timing controller 200, data driver 300

scan driver 400, power source controller 500, compensation controlsignal unit 600, display unit 100

1. A driving method of a display device including a plurality of pixels,each including an organic light emitting diode (OLED), a drivingtransistor connected to a driving voltage and supplying a drivingcurrent to the OLED, a compensation capacitor connected to a gateelectrode of the driving transistor, a first storage capacitorelectrically connected to or disconnected from the compensationcapacitor, and a second storage capacitor, the method comprising: areset step in which an anode voltage of the OLED is discharged; acompensation step in which a threshold voltage of the driving transistoris stored to the compensation capacitor; a scan step in which a datavoltage is stored to the first storage capacitor according to acorresponding data signal; and a light emitting step in which the OLEDemits light according to the driving current flowing to the drivingtransistor by a data voltage stored to the second storage capacitor,wherein the light emitting steps of the plurality of pixels areconcurrently generated, and the scan step and the light emitting stepare temporally overlapped.
 2. The driving method of claim 1, wherein thescan step includes a step in which the connection of the first storagecapacitor and the compensation capacitor is blocked, and the firststorage capacitor is transmitted with the corresponding data signal. 3.The driving method of claim 1, wherein the light emitting step includesa step in which the second storage capacitor and the compensationcapacitor are connected, and the voltage of the gate electrode of thedriving transistor is changed by the data voltage stored in the secondstorage capacitor.
 4. The driving method of claim 1, wherein the resetstep includes a step in which the driving transistor is turned on suchthat an anode of the OLED is connected to the driving voltage, and adifferent driving voltage input to a cathode of the OLED is higher thanthe driving voltage.
 5. The driving method of claim 1, wherein thecompensation step includes a step in which the first storage capacitoris connected to the compensation capacitor, a set voltage is input to anode to which the first storage capacitor and the compensation capacitorare connected, and the driving transistor is diode-connected.
 6. Thedriving method of claim 1, wherein the reset step includes a step inwhich the first storage capacitor and the compensation capacitor areconnected, a set reference voltage is transmitted to a node at which thefirst storage capacitor and the compensation capacitor are connected,and the voltage of the gate electrode of the driving transistor isinitialized by the reference voltage.
 7. The driving method of claim 6,wherein the reference voltage is a level for turning on the drivingtransistor.
 8. The driving method of claim 7, wherein the display devicefurther includes another driving voltage connected to a cathode of theOLED, and a voltage level of the other driving voltage during the resetstep and the compensation step is different than that during the lightemitting step.
 9. A driving method of a display device including aplurality of pixels, each including a driving transistor, a firststorage capacitor, and a second storage capacitor, the methodcomprising: programming first frame data to the first storage capacitorof each of the plurality of pixels during a first scan period;programming second frame data to the second storage capacitor of each ofthe plurality of pixels during a second scan period; and emitting lightthrough the plurality of pixels by a driving current flowing in thedriving transistor of each of the plurality of pixels according to thefirst frame data programmed to the first storage capacitor during afirst light emitting period, wherein the second scan period and thefirst light emitting period are temporally overlapped.
 10. The drivingmethod of claim 9, further comprising programming third frame datapreceding the first frame data to the second storage capacitor of eachof the plurality of pixels; and emitting light through the plurality ofpixels by a driving current flowing in the driving transistor of each ofthe plurality of pixels according to the third frame data programmed tothe second storage capacitor of each of the plurality of pixels during asecond light emitting period, and the second light emitting period andthe first scan period are temporally overlapped.
 11. The driving methodof claim 9, wherein the first frame data is first view point data, andthe second frame data is second view point data different from the firstview point data.
 12. A pixel comprising: an organic light emitting diode(OLED); a driving transistor configured to be electrically connected toa first driving voltage and to supply a driving current to the OLED; acompensation capacitor including one electrode connected to a gateelectrode of the driving transistor; a first operation controltransistor including one electrode connected to another electrode of thecompensation capacitor and configured to be controlled by a firstoperation control signal; a second operation control transistorincluding one electrode connected to the other electrode of thecompensation capacitor and configured to be controlled by a secondoperation control signal; a first storage capacitor including oneelectrode connected to another electrode of the first operation controltransistor; and a second storage capacitor including one electrodeconnected to another electrode of the second operation controltransistor, wherein the second operation control transistor isconfigured such that when it is turned on, the second storage capacitorand the compensation capacitor are connected during a period in whichthe first operation control transistor is turned off such that a datavoltage is stored to the first storage capacitor according to acorresponding data signal.
 13. The pixel of claim 12, furthercomprising: a first switching transistor including one electrodeconnected to the one electrode of the first storage capacitor, andanother electrode configured to be input with the corresponding datasignal and to be controlled by a first scan signal; and a secondswitching transistor including one electrode connected to the oneelectrode of the second storage capacitor, and another electrodeconfigured to be input with the corresponding data signal and to becontrolled by a second scan signal.
 14. The pixel of claim 13, furthercomprising a compensation transistor connected between the gateelectrode and a drain electrode of the driving transistor.
 15. The pixelof claim 14, wherein the first switching transistor is configured to beturned on and the compensation transistor is configured to be turned onduring a compensation period.
 16. The pixel of claim 12, wherein: thefirst storage capacitor includes another electrode configured to beconnected to the first driving voltage; and the second storage capacitorincludes another electrode configured to be connected to the firstdriving voltage.
 17. The pixel of claim 12, wherein: the first storagecapacitor includes another electrode configured to be connected to a setreference voltage different from the first driving voltage; and thesecond storage capacitor includes another electrode configured to beconnected to the reference voltage.
 18. The pixel of claim 12, wherein:the first driving voltage includes a second driving voltage and a thirddriving voltage; the second driving voltage and the third drivingvoltage have the same waveform; and the pixel further includes a firstlight emitting transistor connected between a source of the seconddriving voltage and the driving transistor, and a second light emittingtransistor connected between a source of the third driving voltage andthe driving transistor.
 19. The pixel of claim 12, wherein the pixelfurther includes a source of a fourth driving voltage applied to acathode of the organic light emitting diode (OLED), and the drivingtransistor is turned on during a reset period and the first drivingvoltage has a lower level than the fourth driving voltage.
 20. A displaydevice comprising: a plurality of data lines for transmitting aplurality of data signals; a plurality of first scan lines fortransmitting a plurality of first scan signals; a plurality of secondscan lines for transmitting a plurality of second scan signals; a firstoperation control line and a second operation control line fortransmitting a first operation control signal and a second operationcontrol signal; a first voltage line for transmitting a first drivingvoltage and a second voltage line for transmitting a second drivingvoltage; and a plurality of pixels each connected to a correspondingdata line of the data lines, a corresponding first scan line of thefirst scan lines, a corresponding second scan line of the second scanlines, the first operation control line, the second operation controlline, the first voltage line, and the second voltage line, wherein eachof the pixels includes an organic light emitting diode (OLED) includinga cathode connected to the second voltage line, a driving transistorconnected to the first voltage line for supplying a driving current tothe OLED, a compensation capacitor connected to a gate electrode of thedriving transistor, a first storage capacitor and a second storagecapacitor connected between the compensation capacitor and a source ofthe driving voltage, and wherein the display device is configured toprovide: a first period in which the first storage capacitor isconnected to the corresponding data line according to both a first scansignal of the first scan signals transmitted through the correspondingfirst scan line and the first operation control signal transmittedthrough the first operation control line, and the compensation capacitoris blocked; and a second period temporally overlapped with the firstperiod and in which the second storage capacitor is blocked from thecorresponding data line and is connected to the compensation capacitoraccording to both a second scan signal of the second scan signalstransmitted through the corresponding second scan line and the secondoperation control signal transmitted through the second operationcontrol line.
 21. The display device of claim 20, wherein the displaydevice further includes a compensation control line for transmitting acompensation signal, and each of the pixels further includes acompensation transistor connected between the gate electrode and a drainelectrode of the driving transistor and operated according to thecompensation signal.
 22. The display device of claim 21, wherein duringa reset period in which the compensation transistor is turned on and thefirst driving voltage transmitted through the first voltage line is at afirst level, the display device is configured to provide the seconddriving voltage with a voltage level transmitted through the secondvoltage line that is different from the level of the second drivingvoltage during the first period and the second period.
 23. The displaydevice of claim 22, wherein the first driving voltage is at a secondlevel different from the first level during the first period and thesecond period.